May 5, 2026
Cortus is a fabless semiconductor manufacturing group with a presence in several EU countries. The company designs and sells RISC-V microcontrollers (MCUs) and AI inference chips for automotive and avionics markets. Cortus develops a broad portfolio of proprietary IP and provides a complete software ecosystem, including IDE, compiler, debugger, SDK, and development boards. Over 18 billion devices have been produced using Cortus processors and IP, with around 1.2 billion units shipped annually. Cortus is also one of the dozen Platinum Founding Member of the RISC-V Foundation. Cortus is at the forefront of advanced AI inference chip development.
We are seeking Software Engineers (m/f), with a focus on compiler engineering for AI applications, to join our R&D Center of Excellence in Lecce.
Role Overview
We are building core technology for real-time AI in autonomous driving. Our focus is not on training larger models, but on making them run efficiently and reliably on specialized hardware, this is fundamentally a systems problem. We are looking for engineers to develop the “compiler” layer that takes trained AI models (ONNX) and maps them onto our custom AI hardware for high-performance inference.
You will work at the intersection of:
- Compiler design
- Performance optimization
- Neural network execution
Key Responsibilities
- Convert ONNX models (e.g. YOLO-style networks) into optimized execution graphs
- Map neural network layers onto compute resources under memory, bandwidth, and latency constraints
- Optimize execution through graph transformations (splitting, fusion, scheduling)
- Manage and optimize data movement across the system
- Build tools and infrastructure to ensure robustness and scalability
- Collaborate closely with architecture and system teams
Profile
- Strong understanding of how software executes on hardware
- Ability to reason about performance trade-offs (compute vs memory vs communication)
- Experience with compilers, graph-based systems, or complex software stacks
- Good understanding of neural network structures and execution
- Fluent in English (written and spoken)
Nice to Have
- Experience with compiler frameworks (e.g., LLVM, MLIR, TVM)
- Experience optimizing large-scale or low-latency systems
- Familiarity with ONNX or deep learning frameworks
Why Join Us
- You will define how AI models actually run—not how they are trained
- Your work will have a direct impact on real-world performance
- You will work on challenging problems at the intersection of software and real-world hardware constraints
Mar 31, 2026
To strengthen our digital hardware team in Cortus, we are looking for “ Senior Digital IC Hardware Engineer” (F/M), at our sites of Mauguio-Montpellier (34) or Meyreuil (13).
This is a full-time on-site role for an Application Specific Integrated Circuit Design Engineer at Cortus SAS located in Mauguio or Meyreuil. The role will involve tasks related to Logic Design, Physical Design, RTL Design, RTL Coding, Formal Verification, and other tasks associated with IC design and development.
Qualifications:
- Engineering masters degree in Electronics/Telecommunications/Computer sciences
- Proven 10+ years of experiences as digital designer
- Logic Design and Physical Design skills
- RTL Design and RTL Coding proficiency
- Experience in Formal Verification
- Knowledge of semiconductor design principles
- Strong problem-solving and analytical skills
- English language: written and spoken
Job Type and Primary Location:
- Full time and permanent
- Remote working up to 2 days per week
- Restaurant vouchers
- Flexible hours
Oct 30, 2025
General description
Cortus is at the forefront of edge-cutting AI inference chiplet development. We are seeking a Senior Digital IC Design Engineer (m/f) to join our R&D Center of Excellence in Mauguio and strengthen our on-site hardware design team.
Role Overview
As a Senior Digital IC Engineer, you will be a key contributor and technical lead in the design and development of complex digital integrated circuits (ICs), including System-on-Chip (SoC) and IP cores for AI accelerators. You will also lead the AI accelerator branch, managing and mentoring the engineering team.
Key Responsibilities
- Lead the design, implementation, and verification of digital ICs for AI inference accelerators.
- Manage the engineering team, providing guidance and technical support.
- Participate in all phases of the ASIC/IC development lifecycle, from specification to tape-out.
- Collaborate closely with cross-functional teams, ensuring high-quality and timely delivery.
Minimum requirements
- Education: PhD in Computer Science, Electronics, or Engineering, or MSc in Computer Science/Electronics, or equivalent.
- Experience: Deep experience in defining IPs, CPU architecture, and digital IC implementation.
- Technical Skills:
- Knowledge of configuration database management (Git, SVN).
- Scheduling and reporting activities.
- Language: Proficient in English, both written and spoken.
- Professional Skills:
- Proven communication and interpersonal skills.
- Ability to assume responsibility for a variety of technical tasks and troubleshooting.
- Strong sense of responsibility and ability to meet deadlines.
Candidates with higher educational degree (PhD) and/or extensive professional experience involving similar requirements are strongly exhorted to apply since the related skills will be strongly taken into account within the fast-growing context of the CORTUS’ organization.
Highly preferred skills
Architecture & Computation Knowledge:
- Familiarity with AI/ML hardware accelerators or neural network architectures (e.g., CNNs, ViTs).
- Exposure to AI/ML frameworks (e.g., TensorFlow, PyTorch).
- Knowledge of floating-point formats: FP32, FP16, FP8, FP4.
- Understanding of floating-point operators.
- Experience with SIMD computing units and tensor processing units.
- Awareness of performance bottlenecks in AI workloads on embedded hardware.
Job type and locations
- Employment Type: Full-time, permanent contract.
- Primary Location: Mauguio, Hérault, France.
Application Reference
Application reference: FR-MP-291025-DIG-AI
Benefits of working at CORTUS
This position is intended for mid-level engineers (higher levels will be considered for the ideal candidate) and comes with an attractive compensation package, including:
- Competitive salary
- Meal card and comprehensive health and care insurance
- A culture that values collaboration, teamwork, and recognition, accomplishments are duly celebrated
At CORTUS, we believe in creating an environment where innovation thrives, and where every team member can contribute meaningfully to next-generation technology.
Additional information
CORTUS is committed to fostering a diverse and inclusive workplace and welcomes applications from candidates eager to join an environment that encourages initiative, flexibility, and creativity.
Successful candidates will join a team of highly experienced engineers and innovators working passionately across a wide range of technologies from silicon chip design to cloud-based software interfaces.
We promote transparency and open communication through regular Q&A sessions with the executive team, and support a healthy work-life balance with an open time-off policy and a culture of mutual respect and trust.
Sep 1, 2025
CORTUs is looking for DIGITAL VERIFICATION ENGINEER in Italy with permanent contract.
You will be part of the Hardware Design team, involved in design, verification and physical implementation. Your primary focus will be the verification of System-on-Chip (SoC), IP blocks, and full custom ASIC/IC designs.
Your responsibilities will include :
- Defining verification strategies and testbench architectures (System Verilog, UVM, C-driven, etc) based on circuit specifications to ensure optimal verification coverage
- Developing detailed verification plans aligned with design specifications
- Creating and implementing verification environment and test sequences according to the verification plans
- Taking ownership of verification strategy definition, implementation and ensuring the overall quality of the verification process
- Supervising and mentoring junior verification engineers
- Continuously improving the verification flow and methodology
Minimum requirements
- Engineering Msc. or Bsc. degree in Electronics/Telecommunications/Computer Science or equivalent;
- Deep experience in defining IPs test specification in closed collaboration with product definers and architects;
- Strong experience on digital verification methodologies (Formal and UVM) using state of the art EDA tools;
- Understand and debug digital RTL;
- Determine technology requirements, dependencies and deliverables based on project specifications;
- Experience inwriting IP verification plans, creating test benches and automating regression test suites to ensure 100% coverage prior tape-out;
- Experience with mixed signal (analog, digital) verification methodologies using state of the art EDA tools;
- Capability in developing behavioral models for analog IPs, understand and debug analog schematics;
- Knowledge of Design For Testability (DFT) techniques;
- Knowledge in configuration database management (Git, SVN);
- English language written and spoken
- Proven communication/interpersonal skills;
- Able to assume responsibility for a variety of technical tasks and troubleshooting;
- Strong sense of responsibility and ability to achieve deadlines.
Job type, primary locations and application reference
Full time with permanent contract
Primary locations: LECCE, (Apulia region), Italy
