Michael Chapman, CEO of Cortus, on RISC-V, AI, and Europe’s semiconductor future Interviews | June 10, 2026 By C.J. Abate
Michael Chapman, President, CEO, and Co-founder of Cortus, has worked in processor design since the early days of modern semiconductor development. Over the course of his career, he has contributed to projects ranging from automotive microcontrollers and CAN technology to processor architectures and system-level design tools. In 2005, he co-founded Cortus, a company focused on embedded processor IP and, more recently, advanced RISC-V solutions. The company is one of 12 original founding members of the RISC-V Foundation
In this interview, Chapman discusses the evolution of processor architectures, Europe’s pursuit of technological sovereignty, the growing importance of energy-efficient AI computing, and why he believes open standards and high-performance RISC-V processors will play a critical role in the future of embedded systems, industrial IoT, and AI infrastructure.
1.J. Abate: Tell us a bit about your background. How did you come to co-found Cortus?
Michael Chapman: I have been designing processors for most of my career, starting at a time when semiconductor design looked very different from today. One of my first projects involved designing the ALU for a military processor chipset implemented in 4-micron Silicon-on-Sapphire technology. Back then, transistor layouts were literally drawn by hand on graph paper using coloured pencils.
I later developed the first Controller Area Network (CAN) chip for Intel and subsequently worked with Bosch on CAN implementations for multiple semiconductor companies, including Philips, Motorola, National Semiconductor, NEC and Intel (again). I developed micro-controllers using Intel 16b processor IP for ABS, traction control and engine management systems, all incorporating CAN connectivity.
At Siemens, I became chief architect for the company’s second-generation 16-bit processor architecture. One interesting outcome of that work was the creation of SystemC, which went on to become one of the industry’s most widely used system-level design and modelling languages.
After spending time working on multi-core network processor architectures, I founded Cortus in 2005. The motivation was straightforward: embedded systems needed processor solutions that delivered significantly better efficiency and flexibility than what was available at the time. We developed our own 32-bit processor architecture optimized for embedded applications, and over the years that technology has been incorporated into more than 18 billion devices worldwide, with current production running at around 1.2 billion units annually.
More recently, Cortus has expanded into advanced RISC-V processor development, delivering solutions for demanding applications including automotive, avionics, space and nuclear systems, ranging from low-power microcontrollers to high-performance multicore platforms. Throughout my career, the common theme has been finding practical ways to make computing more efficient, more reliable and more adaptable to the needs of real-world applications.
Abate: Cortus has been involved with RISC-V and open hardware technologies from a very early stage. For eeNews Europe readers following the evolution of open architectures, what originally convinced you that RISC-V would become strategically important for the semiconductor industry?
Chapman: The key attraction of RISC-V was not simply that it was open source. There were already other open source Instruction Set Architectures (ISAs) such as OpenRISC and SPARC. However, it was very clear early on, before the RISC-V foundation was actually created, that the level of interest from large companies such as Google, Microsemi, Qualcomm, IBM, Western Digital, NVIDIA was exceptionally high. To me it was clear that this was not going to be another OpenRISC or SPARC but something that was really going to take off.
Having spent decades working with different processor architectures, I could see that the industry was reaching a point where innovation was increasingly constrained by closed ecosystems. RISC-V offered a way out of this constraint by maintaining compatibility through a standardized ISA, giving companies the freedom to differentiate without sacrificing software portability.
Cortus recognised this potential very early. We were a founding member of the RISC-V Foundation and, at the time, the only non-American organization among a group that included some of the largest technology companies and leading universities in the United States, such as Google, NVIDIA, Microsemi and UC Berkeley. This gave us a unique perspective on the momentum building behind the initiative.
From the beginning, we believed that an open standard ISA could unite the industry around a common architecture while still allowing companies to innovate and differentiate their products. We quickly saw that RISC-V had the potential to attract a global ecosystem of semiconductor companies, software developers, research institutions and system manufacturers.
We also believed that as semiconductors became more specialized — particularly for IoT, automotive, industrial automation, aerospace, and AI accelerators — the industry would need an architecture that could evolve rapidly without being constrained by proprietary roadmaps. RISC-V provided exactly that foundation.
Today we see that prediction being validated. RISC-V has moved from being a research-oriented initiative to becoming a strategic technology adopted by major semiconductor companies worldwide. What began as an academic project has evolved into one of the most important developments in processor architecture in decades.
Abate: Are you seeing more companies approach Cortus because traditional semiconductor platforms no longer meet their performance, power, or differentiation requirements?
Chapman: Yes, absolutely. We are seeing growing interest from companies that want greater control over their technology roadmap and are looking for alternatives to traditional processor ecosystems.
However, the discussion is not simply about licensing costs or product differentiation. Increasingly, it is becoming a strategic issue. Whether we are talking about automotive platforms, avionics, critical infrastructure, AI systems or data centres, processors have become foundational technologies. The countries and companies that control these technologies will have a significant advantage in shaping the next generation of digital infrastructure.
For many applications, performance is the decisive factor. Open architectures such as RISC-V are extremely important, but openness alone is not enough. If Europe wants technological sovereignty, it cannot be satisfied with developing only low-end or mid-range processors while relying on foreign technologies for high-performance computing. The real challenge is to build processors capable of competing at the highest level.
Today, companies such as Intel and AMD continue to dominate strategic markets such as data centres because they offer the best performance and have mature ecosystems. This is not simply a commercial reality; it is also a geopolitical one. The ability to develop world-class processor architectures is increasingly becoming a matter of economic and technological sovereignty.
That is why Cortus is investing heavily in a new generation of high-performance out-of-order RISC-V processors. We believe Europe needs more than access to open architectures. It needs the capability to develop processors that can compete globally in the most demanding markets.
The companies approaching us increasingly understand this challenge. They are not just looking for an alternative architecture. They are looking for long-term control over technologies that have become strategically critical for their business and for Europe’s future.
Abate: Many eeNews Europe readers work in embedded systems and industrial IoT. What are the biggest challenges engineers face today when designing secure, low-power connected devices that are expected to operate reliably for years in the field?
Chapman: The biggest challenge is that engineers are no longer optimizing for a single parameter. Twenty years ago, the focus was often on functionality and cost. Today, they must simultaneously address power consumption, cybersecurity, connectivity, safety, reliability, regulatory compliance and, increasingly, AI capabilities.
Security has become one of the most critical concerns. Many connected devices deployed today will remain in service for ten, fifteen or even twenty years. Engineers must assume that the threat landscape will evolve continuously during the lifetime of the product. Security therefore cannot be treated as an afterthought; it must be built into the hardware architecture from the outset through secure boot, hardware root of trust, cryptographic accelerators, memory protection and secure update mechanisms.
Power consumption remains equally important. Whether it is a battery-powered sensor, an industrial monitoring device or a remote infrastructure system, energy efficiency directly affects operational costs and maintenance requirements. As AI capabilities move to the edge, the challenge becomes even greater because customers want more intelligence without significantly increasing power consumption.
Reliability is another major concern. Coming from an automotive background, I have always viewed reliability as a system-level discipline. Many industrial and IoT systems are expected to operate for years in harsh environments with minimal maintenance. The processor architecture, software stack, security mechanisms and communications infrastructure must all be designed with long-term robustness in mind.
What is changing today is that these devices are no longer just sensors collecting data. They are becoming intelligent decision-making systems. Increasingly, data must be processed locally for reasons of latency, security, privacy and bandwidth efficiency. This requires significantly more computing capability at the edge than was needed only a few years ago.
As a result, the industry is moving towards a new generation of processors that combine security, energy efficiency and AI acceleration in a single platform. The challenge for engineers is to achieve all of this while maintaining the cost and reliability targets that industrial markets demand.
Abate: In March you posted a blog with a message to the European Commission. You wrote: “We call on the European Commission to require, through the Call for Expression of Interest and the Hosting Agreements, that AI Gigafactory infrastructure adopts open, non-proprietary software standards as the interoperability baseline.” Can you explain this in more detail?
Chapman: Our position is that Europe’s investments in AI infrastructure should create long-term strategic value rather than reinforcing technological dependencies.
When public funds are used to build major AI infrastructures, interoperability should be a fundamental requirement. Open, non-proprietary standards ensure that researchers, startups, industrial companies, and public institutions can access and build upon these infrastructures regardless of their choice of hardware or software provider.
This is not about excluding commercial innovation. It is about avoiding vendor lock-in and ensuring that Europe develops a healthy, competitive ecosystem. Open standards encourage competition, portability, innovation, and resilience. They also make it easier for European companies to participate in AI value chains without facing unnecessary barriers.
If Europe wants genuine digital sovereignty, openness and interoperability must be considered strategic priorities from the beginning.
By adopting open, non-proprietary software for AI, this opens the possibility to the chips for AI being designed and manufactured in Europe in the future. If proprietary software is used, then we will have vendor lock in which will make it almost impossible to ever have European AI chips in the data centre.
Abate: Europe is investing heavily in semiconductors, AI infrastructure, and technological sovereignty. From your perspective, where does Europe currently have the strongest opportunities to compete globally, and where does it still risk falling behind?
Chapman: Europe has significant strengths in industrial technology, automotive systems, aerospace, energy management, telecommunications, and advanced manufacturing. These sectors increasingly depend on specialized semiconductors, embedded intelligence, and AI-enabled systems.
Europe also possesses world-class research institutions, engineering talent, and several globally important semiconductor companies. These assets provide a strong foundation for leadership in edge computing, industrial AI, cybersecurity, and sustainable digital infrastructure.
However, Europe still faces structural challenges in scaling technology companies, attracting sufficient growth capital, and building computing infrastructure at the pace seen in other major global regions. In addition, dependence on external hardware and software platforms can, in some cases, limit long-term strategic autonomy.
It is also fair to say that Europe is beginning to invest more significantly in these areas, but the scale is still not yet comparable to the United States or China. Over the past decades, Europe has fallen behind in certain strategic segments such as leading-edge semiconductor manufacturing, high-performance processor design, and large-scale AI infrastructure deployment. These gaps are now well understood, but closing them will require sustained, coordinated effort over many years.
The opportunity remains substantial. Europe has the industrial base, the talent, and the application domains to be highly competitive. However, success will depend on moving beyond fragmented initiatives and ensuring consistent investment across the full value chain—from research and design through to manufacturing, software ecosystems, and deployment at scale.
The recent announcements of billions being invested into data centres in France reveal only part of the story. The chips in those data centres will all come from American companies, and most of them will be manufactured in Taiwan.
There is a lack of investment into the design of semiconductor chips in Europe. This is as important as data-centres and foundries. We need to create the capacity in Europe to design the chips which go into the data-centres. We should not be relying on processor chips from a foreign power which could potentially have a “kill switch” in them.
Abate: Cortus is also working on AI-driven image processing and edge intelligence. For eeNews Europe readers watching the rapid growth of edge AI, what practical applications do you believe will drive adoption fastest over the next few years?
Chapman: We believe the strongest growth will come from applications where local intelligence delivers immediate operational value, particularly in markets where latency, safety, power consumption, and reliability are critical.
In automotive, edge AI is becoming central to advanced driver assistance systems and the evolution toward higher levels of automation. Camera and sensor fusion require real-time inference for perception, object detection, and decision-making, all under strict constraints for power, cost, and functional safety.
In avionics, the requirements are even more stringent. Systems must operate with deterministic behavior and extremely high reliability in certified environments. Edge AI can enhance situational awareness, support predictive maintenance, and improve sensor interpretation, but must do so within strict safety and certification frameworks.
Robotics is another major driver. Industrial and collaborative robots increasingly rely on real-time vision and AI to operate safely in dynamic environments. Low-latency inference at the edge enables fast reaction times and reduces dependence on centralized compute or cloud connectivity.
In drones and autonomous systems, constraints around weight, energy consumption, and connectivity make onboard intelligence essential. Applications such as inspection, surveillance, logistics, and mapping all benefit from local AI processing that maximizes autonomy and endurance.
Finally, in data-centre and AI infrastructure, there is a growing need for efficient inference architectures that complement large-scale training platforms. While GPUs remain dominant for training, inference applications are becoming increasingly diverse and energy-sensitive, creating demand for more specialized, efficient compute solutions.
Across all these domains, a key shift is underway: many applications that traditionally relied on GPU-based processing are moving toward more specialized, energy-efficient processor architectures. At Cortus, we are developing dedicated AI inference CPUs designed specifically to replace power-hungry GPU approaches in inference-heavy use cases, particularly where efficiency per watt and system cost are critical constraints.
Our platform is highly scalable, reaching beyond 2,000 TOPS for high-end implementations, enabling deployment from embedded edge systems through to demanding automotive and industrial AI platforms. This allows customers to maintain a common architecture across multiple product lines while adapting performance to each application segment.
Abate: Energy consumption is becoming a major concern across the electronics industry, especially with the expansion of AI workloads and connected devices. Do you think the industry is entering a period where energy efficiency will become just as important as raw computing performance?
Chapman: Yes, and in many areas, that shift has already happened.
For a long time, the industry was primarily driven by raw performance. The assumption was that more compute power automatically meant better capability. That is no longer the case. Today, energy consumption is becoming a first-order design constraint across almost every segment of computing, from embedded devices to large-scale data centers.
In edge systems, the constraint is often physical: battery life, thermal limits, and form factor. In industrial and automotive environments, it is about reliability, cost of operation, and system longevity. And in data centers, it is increasingly about economics and infrastructure limits, where power availability and cooling capacity are now as critical as compute density.
AI is accelerating this transition. Training workloads have already pushed GPU-based systems to extreme power levels, and inference is now scaling across billions of deployed devices. This makes efficiency per watt a central metric, not a secondary optimization.
As a result, the industry is moving toward architectures that are more specialized and more efficient by design. General-purpose compute still has its place, but it is no longer sufficient on its own. The future will be shaped by heterogeneous systems that combine CPUs, accelerators, and domain-specific architectures optimized for energy efficiency.
At Cortus, this is a core focus. Our approach is to design processors and AI inference architectures where performance is always evaluated together with power efficiency. In many real-world applications, the most valuable solution is not the fastest one in absolute terms, but the one that delivers the required performance at the lowest possible energy cost.
That is why energy efficiency is no longer a trade-off against performance, it is becoming a defining measure of performance itself.
Abate: Looking ahead five years, what major shifts do you expect in embedded computing and semiconductor design, and what role do you hope Cortus will play in shaping that future?
Chapman: Over the next five years, I expect three major shifts to accelerate across embedded computing and semiconductor design.
First, domain-specific computing will continue to expand. We are moving away from the era of purely general-purpose processors toward architectures that are increasingly optimized for specific workloads such as automotive perception, industrial control, avionics systems, robotics, and AI inference. The ability to tailor compute to the application will become a key differentiation.
Second, edge AI will become a default capability rather than an add-on. Intelligence will move closer to sensors and actuators, enabling real-time decision-making with lower latency, reduced bandwidth requirements, and improved energy efficiency. This will fundamentally change how embedded systems are designed, from distributed sensor nodes through to centralized edge compute platforms.
Third, semiconductor design itself will become more heterogeneous and modular. We will see tighter integration of CPUs, accelerators, and specialized processing engines, with system architectures designed around workload composition rather than single-core performance. In this context, energy efficiency will remain a defining constraint, not just raw compute capability.
I hope we will also see a realization of the importance of chip design in Europe and that we will see major investments into that critical part of our infrastructure.
Open architectures such as RISC-V will continue to gain momentum as they enable this kind of specialization without locking companies into fixed, proprietary roadmaps. However, the key challenge for the industry is no longer just openness, it is achieving openness at high performance levels across all market segments, including the most demanding applications.
At Cortus, our ambition is to contribute directly to this transition. We are focused on developing efficient, secure, and highly scalable computing platforms that span embedded systems through to high-performance AI and real-time processing applications. This includes advanced RISC-V processor architectures and AI inference designed for applications such as automotive, avionics, robotics, and edge infrastructure.
Our goal is to demonstrate that openness, performance, and energy efficiency are not competing objectives, but can be achieved together in a single coherent architecture. In doing so, we aim to help shape a future where companies can build differentiated, high-performance systems without being constrained by closed ecosystems or unnecessary architectural limitations.
