General description and main responsibilities:
Cortus is a French fabless semiconductor manufacturing group with a presence in several EU countries.
Cortus designs and sells microcontrollers (MCUs) and system-on-chips (SoCs) for Consumer, Automotive and IoT/5G NB-IoT applications, as well as high performance processor chips for HPC, Server, Mobile and AI Edge Computing using its large own proprietary IP portfolio including processors 32/64 bits (Cortus ISA and RISC-V ISA), digital, RF, analog, mixed-signal, security, safety, peripherals and embedded SW. Cortus offers the complete ecosystem (IDE, compiler, debugger, SDK, Development Board, etc). . Over 15 billion devices have been produced using the Cortus processors and Ips, and 1.2 billion units shipped per year.
Cortus is one of the dozen Platinum Founding members of the RISC-V foundation.
CORTUS is working on the next generation of high-end RISC-V processors for supercomputers.
For this, we are looking for talented Back-End IC Design Engineers (m/f) with all levels of experience to strengthen our dynamic and innovation-driven R&D team for our Center of Excellence in Valencia (Spain) where is planned to hire 10+ engineers by 2023/2024.
The candidate(s) must have a strong background in microelectronic design and implementation with at least 5+ years of experience in integrating IP from external and internal suppliers and be able to streamline layout activities and drive IP requirements in the physical domain. He/She will, (i) work closely with design teams to understand system specification and control physical aspects early in the design flow and (ii) assess layout requirements with external partners validating their outputs and keeping track the project schedule for the Back-End side. Different levels of experience will be considered but the candidate should display a solid understanding of all physical implementation activities.
The ideal applicants should be familiar on working in a multicultural environment and with teams spread over several sites.
- Engineering degree or Master or equivalent in Microelectronics/Telecommunications/Computer Science;
- Deep experience in translating schematics to mask Layouts
- Experience with all aspects of physical ASIC/SoC integration including floorplanning, clock and power distribution, global signal planning, I/O planning and hard IP integration;
- Experience with layout implementation criticalities (e.g. matching, electro-migration, Latch‑Up and ESD);
- Capability to handle main Physical Design Verification flow steps performing LVS, DRC, ERC, and all required verifications with and corresponding main EDA tools;
- Capability to handle top-level layout integration tape-out process, which involves generation of bond diagram/RDL, final clean GDS database and proper documentation;
- Knowledge about Analog-On-Top and Digital-On-Top approach and methodologies, P&R flow steps;
- Scheduling and reporting activities;
- English language written and spoken;
- Proven communication/interpersonal skills;
- Able to assume responsibility for a variety of technical tasks and troubleshooting;
- Strong sense of responsibility and ability to achieve deadlines.
The candidates with higher educational degree (PhD) and/or extensive professional experience involving similar requirements are strongly exhorted to apply since the related skills will be strongly taken into account within the fast-growing context of the CORTUS’ organization.
Highly preferred skills (plus)
- Script programming language (e.g. perl, shell, phyton);
- Familiar with packaging engineering.
Job type, primary locations and application reference
Full time with permanent contract
Location: Valencia, Spain
Application reference: CRTS-SP-MAL-2310-BEE
Benefits of working at CORTUS
This position is open to engineers of all levels (higher levels will be considered for the ideal candidate) and carries an attractive salary, meal card, health and care insurance. Collaboration and teamwork are highly valued, and accomplishments are duly celebrated.
CORTUS commits to a diverse and inclusive workplace and welcomes applications from candidate willing to work in an environment that allows initiative and requires flexibility. In this context the selected applicants will join a team of exceptionally capable colleagues who work passionately on everything from silicon chip designs to cloud web interfaces. Periodical open Q&A sessions with the executive team. Open time-off policy paired with a profound respect for work/life balance.