PMIC Designer

General description and main responsibilities

CORTUS is working on the next generation of IoT connectivity modems building up 5G massive Machine Type Communication (mMTC) chipset that will define ultralow power, high reliability and lowcost benchmarks for SoC products that rely on NBIoT, BLE and IEEE 802.15.4.
To become a chip leader in wireless connectivity for the IoT market, we are looking for Junior/Mid Power Management IC Design Engineers (m/f) for our R&D centers of excellence.

The candidate must have a solid background in Analog and Mixed Signal microelectronic with at least 2+ years of experience in power management IC design.

As a Power Management IC designer, you will develop new efficient DC/DC IPs (e.g. bucks, boosts, buckboosts converters, charge pumps, chargers, LDOs) and implement circuit design with bestpractice layout techniques.
He/She will directly interact with system architects, Digital design team, AMS design teams and BackEnd
engineers for the integration of the Power Management functions into the CORTUS’ SoC family product for wireless connectivity.

The ideal applicants should be familiar on working in a multicultural environment and with teams spread over several sites.

Minimum requirements

Engineering Msc. or Bsc. degree in Electronics/Telecommunications or equivalent;
Deep experience in design and optimization of voltage regulator high level architecture and lowlevel circuits; knowing which are suitable for given applications;
Experience in power management architecture topologies, such as PWM control, constantontime control, and voltage/current mode controls;
Capability to handle the design of CMOS/BCD power management circuits (buck, boost, LDOs, bandgaps, bias, comparators, and opamps ) with main EDA tools and meeting performance, area, power and speed constraints;
Capability to review and provide feedback for Printed Circuit Board design from a power perspective and associated I/O;
Knowledge of physical construction and characteristics of capacitor and inductors (onchip and offchip);
Knowledge of LatchUp and ESD phenomena to assure the functional security of the system
Scheduling and reporting activities;
English language written and spoken;
Proven communication/interpersonal skills;
Able to assume responsibility for a variety of technical tasks and troubleshooting;
Strong sense of responsibility and ability to achieve deadlines.

Highly preferred skills (plus)

Experience modeling circuits in Matlab, VerilogA, Python, or C for concepts prior to implementation;
Validate analog/power designs on a lab bench using spectrum analyzers, oscilloscopes, signal generators, etc;
Design with detailed testability; write test plans for trim and calibration; collaborate with test engineers;
Script programming language (e.g. perl, shell, phyton);
Familiar with realtime embedded software (especially debugging).

Job type, primary locations and application reference

Full time with permanent contract
Primary locations: LECCE, (Apulia region), Italy

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491 rue Charles Nungesser
Bâtiment Télécom II

Phone Number


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