Verification/validation Engineer

Description of the role :

Perform system check at SoC level
Perform IP verification

Create behavioral models

Write validation plans and validation reports

Implement tests and simulations

Minimum requirements :

Engineering diploma/Phd in Electronics/Telecommunications/Computer Science or equivalent
Deep experience in defining IPs test specification in closed collaboration with product definers and architects
Strong experience on digital verification methodologies
Understand and debug digital RTL
Determine technology requirements, dependencies and deliverables based on project specifications
Experience in writing IP verification plans, creating test benches and automating regression test suites to ensure 100% coverage prior tapeout
Experience with mixed signal (analog, digital) verification methodologies using state of the art EDA tools
Capability in developing behavioral models for analog IPs, understand and debug analog schematics
Knowledge of Design For Testability (DFT) techniques
Knowledge in configuration database management (Git, SVN)
Scheduling and reporting activities
English language written and spoken

Highly preferred skills (plus)

Basic Experience with RISCV ISA
Software development using C/C++
Script programming language (e.g. perl, shell, pyhton)
Familiar with realtime embedded software (especially debugging)

Job type and primary locations :

Primary locations:
Meyreuil (13), France
Mauguio (34), France

Full time and permanent

Remote Working up to 2 days per week (after integration period)

Restaurant vouchers (SWILE)

Flexible hours
Referral bonus
Holiday bonus

Your Smart Solution Partner


491 rue Charles Nungesser
Bâtiment Télécom II

Phone Number


VAT Nº FR 43 484 893 763

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